Construct a logic circuit diagram for the exclusive-OR (XOR) function using…

2011

Construct a logic circuit diagram for the exclusive-OR (XOR) function using only NOR gates.

Attempted by 2 students.

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Concept

A gate set is functionally complete, or universal, when every Boolean function can be written using that gate alone. NOR is universal, and the proof is constructive. Writing the gate as x NOR y = (x + y)′, three identities follow directly:

  • Tying both inputs of a NOR together gives x NOR x = (x + x)′ = x′, so one NOR is an inverter.

  • Inverting a NOR output gives (x NOR y) NOR (x NOR y) = ((x + y)′)′ = x + y, so two NOR gates form an OR.

  • Inverting each input first gives (x NOR x) NOR (y NOR y) = (x′ + y′)′ = x·y by De Morgan, so three NOR gates form an AND.

Two further abstract facts do the design work. A NOR gate is itself a complemented sum, so any function written in the shape "complement of a sum of terms" maps onto one NOR gate directly; and because a NOR expands by De Morgan into a product of complemented inputs, a complemented signal enters the algebra without needing a separate NOT gate type — producing an explicitly inverted output still costs one NOR with its two inputs tied together. Exclusive-OR, finally, is defined as A ⊕ B = A′B + AB′: the output is 1 exactly when the two inputs differ.

Applying the concept: building the network

Complementing the definition of exclusive-OR puts it into the NOR-friendly shape (A ⊕ B)′ = (A′B + AB′)′ = NOR(A′B, AB′). The construction therefore reduces to three moves: produce the two product terms A′B and AB′ out of NOR gates, NOR those two terms together to obtain exclusive-NOR, and invert once. Carrying each move out gives the following five gates.

  1. Gate 1 — the shared complemented sum. Feed both variables into one NOR: N1 = A NOR B = (A + B)′. Its own complement is N1′ = A + B, the OR term that both product terms need, so this single gate is shared by the next two.

  2. Gate 2 — the term A′B. Feed A and N1 into a NOR. Expanding by De Morgan, N2 = A NOR N1 = (A + N1)′ = A′ · N1′ = A′(A + B) = A′A + A′B = 0 + A′B = A′B, because A′A = 0 removes the unwanted term.

  3. Gate 3 — the term AB′. Feed B and N1 into a NOR, which is the same algebra with A and B exchanged: N3 = B NOR N1 = B′ · N1′ = B′(A + B) = AB′ + BB′ = AB′ + 0 = AB′.

  4. Gate 4 — combine into exclusive-NOR. Feed the two product terms into a NOR: N4 = N2 NOR N3 = (A′B + AB′)′ = (A ⊕ B)′. One NOR over two terms is exactly the complement of their sum, which here is the exclusive-NOR of A and B.

  5. Gate 5 — invert to get exclusive-OR. Tie both inputs of the final gate to the single signal N4, so that it acts as an inverter: F = N4 NOR N4 = N4′ = A ⊕ B.

Five NOR gates, no other gate type, and only the true inputs A and B are required — no separately generated complements are assumed. Stopping at Gate 4 yields exclusive-NOR in four NOR gates; the fifth gate is precisely the inverter that turns it into exclusive-OR. Five gates is the standard minimum NOR-only realisation of XOR.

The circuit diagram

Every gate below is a NOR: an OR body with an inversion bubble, drawn here as the small circle on the output. Signals flow left to right through four levels.

                     +---------+
       A ------------|         |
                     |  NOR 1  o----  N1 = (A + B)′
       B ------------|         |
                     +---------+

                     +---------+
       A ------------|         |
                     |  NOR 2  o----  N2 = A′B
      N1 ------------|         |
                     +---------+

                     +---------+
       B ------------|         |
                     |  NOR 3  o----  N3 = AB′
      N1 ------------|         |
                     +---------+

                     +---------+
      N2 ------------|         |
                     |  NOR 4  o----  N4 = (A ⊕ B)′
      N3 ------------|         |
                     +---------+

                     +---------+
      N4 -----+------|         |
              |      |  NOR 5  o----  F  = A ⊕ B      <-- output
              +------|         |
                     +---------+

   fan-out :  A  -> NOR 1, NOR 2        B  -> NOR 1, NOR 3
              N1 -> NOR 2, NOR 3        N4 -> both inputs of NOR 5

The same five gates as a wiring list, level by level:

Gate

Input 1

Input 2

Output

Output expression

Gate 1 (level 1)

A

B

N1

(A + B)′

Gate 2 (level 2)

A

N1

N2

A′B

Gate 3 (level 2)

B

N1

N3

AB′

Gate 4 (level 3)

N2

N3

N4

(A ⊕ B)′

Gate 5 (level 4)

N4

N4

F

A ⊕ B

Input A fans out to Gate 1 and Gate 2, input B fans out to Gate 1 and Gate 3, the Gate 1 output fans out to Gate 2 and Gate 3, and the Gate 4 output is wired to both inputs of Gate 5 so that the last gate acts as an inverter. Nothing in the network consumes a complemented copy of A or B that the network has not itself produced, which is what keeps the design inside the NOR-only restriction.

Cross-check: propagate all four input combinations

Evaluating each gate row by row confirms the network, and the last column must reproduce the exclusive-OR definition, namely output 1 only when the inputs differ:

A

B

N1 = (A+B)′

N2 = A NOR N1

N3 = B NOR N1

N4 = N2 NOR N3

F = N4 NOR N4

0

0

1

0

0

1

0

0

1

0

1

0

0

1

1

0

0

0

1

0

1

1

1

0

0

0

1

0

The F column reads 0, 1, 1, 0, which is exactly A ⊕ B, so the five-NOR network realises the exclusive-OR function. As a second check, the N4 column reads 1, 0, 0, 1, the exclusive-NOR, confirming that Gate 4 does the combining and Gate 5 only inverts.

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