Course module

Computer Architecture — ZERO TO HERO

Lessons: 157
Duration: 11 hr 52 min
PYQs: 0
Practice: 929

Syllabus index

Lessons in this module

157 linked lessons

Basics of COA

Introduction, H/W & S/W

Input Output Devices

Basics of Memory

Evolution & History

Computer Classification & Flynn’s Taxonomy

CPU Organization Basics

Instruction Set Architecture (ISA) & Design

Encoding Schemes

Types of Software

Computer Interfaces

Floating Point Rep

Floating Point Basics

IEEE 754 Standards

Booth’s Algorithm

Cache Memory Organization

Hierarchy & Locality

Units & Cache Mapping Techniques Basics

Direct Mapping

Associative Mapping

Set Associative Mapping

Cache Replacement Policies & Miss Types

Memory Organisation & Performance

Coherence & Write Policy

Input Output Organisation

Pipelining

Pipelining Basics

Performance & Speedup

Structural & Control Hazards

Data Hazards & Soln

Instr Formats & Modes

Control Unit Design

Instruction Types

Hardwired & Microprogrammed CU

RISC vs CISC Arch