A one-bit adder or subtractor is easy to memorise. Multi-bit questions reveal whether you can track carry, borrow and overflow as different signals. Four-bit ripple circuits produce 1011 + 0110 = 10001 and 1001 - 0110 = 0011, while one controlled circuit performs both operations. Start at the LSB, label each signal, and check the assembled bits in decimal.
Adders and subtractors are combinational arithmetic circuits
An adder maps operand bits plus optional Cin to S and Cout. A subtractor maps operand bits plus optional Bin to D and Bout. Current inputs determine outputs, so these are combinational, not storage. CS Fundamentals is the subject route; Combinational Circuits in Digital Electronics guide places the same 1011 + 0110 ripple trace inside a broader design method. Borrow chains, controlled adder-subtraction and signed overflow extend that foundation.
A and B are operand bits. Cin and Cout denote carry; Bin and Bout denote borrow. Bit 0 is the LSB. A one-bit stage obeys:
A + B + Cin = S + 2CoutA - B - Bin = D - 2Bout
These are arithmetic identities. In gate equations, + means Boolean OR.
Half adder and full adder: tables, equations and construction
Half adder:
A | B | S | C |
|---|---|---|---|
0 | 0 | 0 | 0 |
0 | 1 | 1 | 0 |
1 | 0 | 1 | 0 |
1 | 1 | 0 | 1 |
Thus S = A XOR B and C = AB. Without Cin, it cannot serve as a non-LSB stage.
Full adder:
A | B | Cin | S | Cout |
|---|---|---|---|---|
0 | 0 | 0 | 0 | 0 |
0 | 0 | 1 | 1 | 0 |
0 | 1 | 0 | 1 | 0 |
0 | 1 | 1 | 0 | 1 |
1 | 0 | 0 | 1 | 0 |
1 | 0 | 1 | 0 | 1 |
1 | 1 | 0 | 0 | 1 |
1 | 1 | 1 | 1 | 1 |
Equations are S = A XOR B XOR Cin and Cout = AB + Cin(A XOR B). The majority form is Cout = AB + ACin + BCin.
Construction uses two half adders and OR: HA1 gives P = A XOR B, C1 = AB; HA2 gives S = P XOR Cin, C2 = P Cin; then Cout = C1 + C2.
Four-bit ripple-carry addition worked bit by bit
Take A = 1011 (11), B = 0110 (6), C0 = 0. Start at bit 0.
Bit | Calculation | Result |
|---|---|---|
0 |
|
|
1 |
|
|
2 |
|
|
3 |
|
|
Thus C4 S3 S2 S1 S0 = 10001; 11 + 6 = 17. Stored sum is 0001, with separate unsigned Cout = 1. Dropping it changes the value.
Carries are C1 = 0, C2 = 1, C3 = 1, C4 = 1. Each stage awaits the previous carry, so worst-case delay grows with stage count.
Half subtractor, full subtractor and a borrow chain
Half subtractor:
A | B | D | Borrow |
|---|---|---|---|
0 | 0 | 0 | 0 |
0 | 1 | 1 | 1 |
1 | 0 | 1 | 0 |
1 | 1 | 0 | 0 |
Thus D = A XOR B, Borrow = NOT(A)B. Borrow occurs only for A = 0, B = 1.
A | B | Bin | D | Bout |
|---|---|---|---|---|
0 | 0 | 0 | 0 | 0 |
0 | 0 | 1 | 1 | 1 |
0 | 1 | 0 | 1 | 1 |
0 | 1 | 1 | 0 | 1 |
1 | 0 | 0 | 1 | 0 |
1 | 0 | 1 | 0 | 0 |
1 | 1 | 0 | 0 | 0 |
1 | 1 | 1 | 1 | 1 |
For a full subtractor, D = A XOR B XOR Bin and Bout = NOT(A)B + NOT(A)Bin + B Bin. Equivalently, Bout = NOT(A)B + Bin NOT(A XOR B).
Calculate 1001 (9) minus 0110 (6), with b0 = 0; bi is the borrow entering bit i.
Bit
0:1 - 0 - 0givesD0 = 1,b1 = 0.Bit
1:0 - 1 - 0givesD1 = 1,b2 = 1.Bit
2:0 - 1 - 1 = -2givesD2 = 0,b3 = 1.Bit
3:1 - 0 - 1givesD3 = 0,b4 = 0.
So D3D2D1D0 = 0011, matching 9 - 6 = 3. Carry and borrow move towards the MSB but remain distinct.
One adder-subtractor circuit performs both operations
For mode M, feed B'i = Bi XOR M and set C0 = M. Then M = 0 gives A + B; M = 1 gives A + NOT(B) + 1 = A - B in two's complement.
For A = 0100 (4) and B = 0011 (3):
M = 0:B' = 0011,C0 = 0, so0100 + 0011 = 0111(7), withCout = 0.M = 1:B' = 1100,C0 = 1, so0100 + 1100 + 1 = 10001. Retain0001(1); leading1isCout. Thus4 - 3 = 1.
Mode complements B through XOR gates and supplies the added 1. In fixed-width signed arithmetic, discarded Cout alone does not indicate overflow.
Carry, borrow, overflow and propagation delay differ
Cout reports carry beyond unsigned width. Final Bout = 1 reports unsigned underflow in a direct subtractor. Signed two's-complement overflow means an out-of-range signed result. A ripple adder uses carry into sign bit XOR carry out.
Four-bit signed 0111 (+7) plus 0011 (+3) leaves 1010. Here C3 = 1, C4 = 0, so V = C3 XOR C4 = 1; two positives appearing negative confirms overflow. The ripple addition's C4 = 1 matters for unsigned 11 + 6 = 17, but not alone for signed overflow.
Use the supplied model. At 2 ns per carry stage, four stages take 4 x 2 ns = 8 ns. With 1 ns final carry-to-sum delay, the MSB sum takes 3 x 2 + 1 = 7 ns. These are not hardware constants.
Exam traps and a repeatable solving routine
Trap | What goes wrong | Correction |
|---|---|---|
Start at MSB | Signal direction is wrong | Start at bit |
Give half adder | That input is absent | Use a full adder |
Use | Borrow direction reverses | Use |
Equate | Unsigned and signed status mix | Test sign-bit carries |
Complement | Subtraction is incomplete | Set |
Read subtraction | A false fifth bit appears | Retain fixed-width bits |
Questions may ask for a table row, equation, full stage from half stages, ripple trace, mode switch, status distinction or supplied delay.
Routine: identify width and representation, write the LSB input, trace every signal, assemble MSB to LSB, then check in decimal. KnowledgeGate offers over 40 practice questions on Adders & Subtractors. Use Combinational Circuits MCQs for practice and GATE Guidance by Sanchit Sir for structured preparation.
Adders and subtractors: the short version and next step
Remember: XOR gives sum or difference, AND gives half-adder carry, and NOT(A)B gives half-subtractor borrow. Full stages accept incoming signals; chaining creates word-level circuits.
Keep three anchors: 1011 + 0110 = 10001; 1001 - 0110 = 0011; controlled 0100 + 0011 = 0111 at M = 0, but 0100 - 0011 = 0001 at M = 1. Retrace signals, redraw the controlled circuit, and explain why M reaches the XOR bank and C0. Continue with Zero to Hero for a broader core-CS path.
