Cache numericals appear in the Computer Organization portion of GATE CS with remarkable regularity, and they are among the most formula-predictable marks in the paper. Two ideas do most of the work: what happens on a write (write-through versus write-back) and how to average access time across cache levels (AMAT).
The arithmetic is easy; marks are lost in picking the wrong formula variant, almost always hierarchical versus simultaneous access. This post derives both, works the write-traffic comparison with concrete numbers, and solves an L1/L2 numerical step by step.
Cache write policies: what happens on a write
Reads are simple: hit serves the word, miss fetches the block. Writes force a decision, because the cache copy and the memory copy can now disagree. The two answers to "when do we update memory?" are the two write policies.
Write-through. Every write updates the cache and main memory together. Memory always holds the current value, so a block can be dropped on eviction without bookkeeping. The cost is traffic: every write travels to memory, so these designs usually add a write buffer.
Write-back. A write updates only the cache block and sets a dirty bit. Memory is updated once, when that dirty block is evicted. Repeated writes to one block cost one transfer instead of many, at the price of a status bit per block and a stale memory in between.
The pairings to remember: write-back with write-allocate (fetch the block on a write miss, then write to it), write-through with no-write-allocate (send the word straight to memory, do not load the block).
Aspect | Write-through | Write-back |
|---|---|---|
Memory updated | On every write | Only when a dirty block is evicted |
Memory copy | Always current | Stale until eviction |
Extra hardware | Write buffer (typical) | Dirty bit per block |
Usual write-miss pairing | No-write-allocate | Write-allocate |
Traffic scales with | Number of writes | Number of misses and dirty evictions |
The last row of that table is the entire traffic argument, and it is exactly what the numericals test.
Write-through vs write-back: the traffic arithmetic
Take a program issuing 1,00,000 memory references, 20% of them writes. The cache has 16-byte blocks, a 4-byte word, and a 0.95 hit ratio for reads and writes alike. For write-back, assume a steady-state cache in which each miss replaces a resident block and 30% of evicted blocks are dirty.
Write-through (with no-write-allocate). Every write sends one word to memory, hit or miss:
Write traffic: 20,000 writes × 4 bytes = 80,000 bytes.
Read misses fetch a block each: 80,000 reads × 0.05 = 4,000 misses × 16 bytes = 64,000 bytes.
Total memory traffic: 80,000 + 64,000 = 1,44,000 bytes.
Write-back (with write-allocate). All misses, read or write, fetch a block; memory sees a write only for dirty evictions:
Misses: 1,00,000 × 0.05 = 5,000. Block fetches: 5,000 × 16 = 80,000 bytes.
Dirty write-backs: 5,000 evictions × 0.30 = 1,500 × 16 bytes = 24,000 bytes.
Total memory traffic: 80,000 + 24,000 = 1,04,000 bytes.
Write-back wins here, and the structure of the win is the exam point: write-through traffic grows with the write count, write-back traffic grows with the miss count times block size. Raise the write fraction and write-back pulls ahead; make blocks huge with a poor hit ratio and the comparison can flip. GATE questions move these dials and ask you to recompute.
AMAT: the base formula for average memory access time
For a single cache in front of main memory:
AMAT = Hit time + Miss rate × Miss penalty
If a cache hits in 1 ns, misses 5% of the time, and a miss costs an extra 100 ns, AMAT = 1 + 0.05 × 100 = 6 ns. Note the wording: miss penalty is the additional time paid on a miss, on top of the hit time. When a question instead gives raw access times per level, you must decide how the levels are organized, which is where the two multi-level formulas come from.
Hierarchical vs simultaneous access: the two AMAT formulas
Let H1 and H2 be the hit ratios of L1 and L2 (H2 measured on the requests that reach L2), with access times T1, T2, and Tm for L1, L2, and main memory.
Simultaneous (parallel) access. Every level starts its lookup at the same time; you pay only the time of the level that serves the request:
T = H1 × T1 + (1 − H1) × H2 × T2 + (1 − H1)(1 − H2) × Tm
Hierarchical (serial) access. You search L1 first; only on a miss do you go to L2, having already paid T1; and so on down:
T = H1 × T1 + (1 − H1) × H2 × (T1 + T2) + (1 − H1)(1 − H2) × (T1 + T2 + Tm)
Expand this and the bracket around T1 sums to 1, giving the compact form worth memorising:
T = T1 + (1 − H1) × T2 + (1 − H1)(1 − H2) × Tm
That is the base AMAT formula applied recursively: hit time T1, miss rate (1 − H1), and a penalty that is itself the AMAT of the L2-plus-memory system. Hierarchical access and the miss-penalty formulation are the same mathematics written twice.
L1/L2 AMAT numerical solved step by step
A GATE-pattern problem: L1 access time 1 ns, hit ratio 0.9; L2 access time 10 ns, hit ratio 0.8; main memory 100 ns. Find the average memory access time under both organizations.
Hierarchical access. Use the compact form:
T = T1 + (1 − H1) × T2 + (1 − H1)(1 − H2) × Tm
T = 1 + 0.1 × 10 + 0.1 × 0.2 × 100
T = 1 + 1 + 2 = 4.0 ns
Simultaneous access. Only the serving level charges its time:
T = 0.9 × 1 + 0.1 × 0.8 × 10 + 0.1 × 0.2 × 100
T = 0.9 + 0.8 + 2.0 = 3.7 ns
Same system, two defensible answers, 0.3 ns apart; in a numerical-answer question, that gap can separate a correct result from an incorrect one. The reading rule: "on a miss, the L2 cache is accessed" signals hierarchical; "the caches are looked up in parallel" signals simultaneous. A stated miss penalty means the organizing is already done: apply the base formula as given.
One drill in reverse, because GATE loves the missing variable. Same hierarchical system: what L1 hit ratio keeps AMAT within 2 ns? The L2-plus-memory penalty is 30 ns, so 1 + m1 × 30 ≤ 2 gives m1 ≤ 1/30, an L1 hit ratio of at least about 96.7%.
How GATE tests cache write policies and AMAT
Four patterns cover nearly everything this sub-topic has asked:
Plug-in AMAT: hit time, miss rate, miss penalty given. The trap is units, cycles versus nanoseconds.
Organization choice: access times given raw; the answer depends on hierarchical versus simultaneous, as worked above.
Write-policy traffic: compare bytes moved under write-through and write-back for a given reference mix.
Combined with mapping: an AMAT question stapled to a tag-bit or set-index computation, testing both at once.
Our GATE CS subject weightage breakdown makes the case for Computer Organization as a high-return subject. For structured coverage, the Cache Memory Organization learn module walks the full chapter, and KnowledgeGate's published question bank carries hundreds of cache-memory questions, including a dedicated coherence and write-policy sub-area, so practice supply is not your constraint. For cycle-specific paper rules and scoring, use the official GATE portal.
The short version
Cache write policies and AMAT reward one careful hour of derivation over ten hours of formula-sheet staring. Lock in four things:
Write-through pays per write; write-back pays per miss and dirty eviction.
AMAT = hit time + miss rate × miss penalty, and "penalty" means the extra time.
Hierarchical: T = T1 + (1 − H1)T2 + (1 − H1)(1 − H2)Tm. Simultaneous: weight each level's raw time by the probability it serves the request.
Read the wording for the organization before touching the calculator.
Then test it under exam pressure. The GATE Test Series includes a dedicated Computer Architecture subject test among its 46 tests, exactly where an AMAT numerical should stop costing you time. For the wider plan, start from the GATE preparation category.
Derive both formulas once by hand, solve the worked examples here without looking, and this topic moves from "I hope they ask the version I know" to marks you count on.
