Computer Organization & Architecture
29 articles in this topic
Pipelining in COA: Speedup, Hazards, and Worked GATE Examples
Build a clear mental model of pipelining, then use it to solve clock-period, speedup, throughput, efficiency, and hazard questions step by step.
Multiprocessors in COA: Concepts, Amdahl's Law and Cache Coherence Worked Examples
Connect multiprocessor classifications, interconnects, memory models, speedup and cache coherence. Then solve the Amdahl and MESI patterns GATE questions rely on.
Input Output Organisation in COA: Programmed I/O, Interrupts and DMA, with Worked Examples
See how Data, Status and Control registers support programmed I/O, interrupts and DMA. Then solve a complete cycle-stealing bandwidth calculation.
Floating Point Representation in COA: IEEE 754 Explained with Worked Examples
Learn the IEEE 754 single-precision layout through two complete conversions, then understand hidden bits, biased exponents, special values, and rounding errors.
Control Unit Design in COA: Hardwired vs Microprogrammed, with Worked Examples
Build control unit design from timed micro-operations. Work through a fetch and LOAD sequence, derive control signals, and size horizontal and vertical microcode.
Register Transfer and Microoperations in COA: RTL Notation, Bus Design, and Every Microoperation Type with Worked Examples
RTL becomes easy when you treat every statement as parallel hardware action at one clock edge. This guide works through buses, subtraction, bit masks, insertion, and signed shifts.
Programming the Basic Computer (COA): Instruction Set, Assembly Language and Worked Examples
Learn the Morris Mano Basic Computer by decoding an indirect instruction and assembling a subtraction program from source to final memory values.
Coal India Management Trainee (Systems) Syllabus Decoded: the Technical and Aptitude Split
The MT Systems paper is two preparation jobs: a CS core revised for recall speed, and an aptitude half built beside it. The notification settles the numbers.
Coal India MT Systems Preparation Strategy: How Much of Your GATE CS Prep Transfers
Reuse your GATE CS foundation instead of rebuilding it. Most of the technical core transfers to MT Systems. The aptitude half is what you add, over ten weeks.
Hardwired vs Microprogrammed Control Unit for GATE: Microinstruction Sizing Numericals Solved
Separate the qualitative comparison from the sizing numerical. Two worked control-store examples show exactly where every microinstruction bit comes from.
Booth's Algorithm for GATE: Signed Multiplication Traced Step by Step
Trace Booth multiplication through A, Q and Q-1, preserve the sign during every shift, and count additions and subtractions from bit transitions.
Cache Write Policies and Multi-Level Cache Numericals for GATE: AMAT Solved Step by Step
Write-through vs write-back traffic arithmetic and the hierarchical vs simultaneous AMAT formulas, derived once and drilled on L1/L2 GATE-pattern numericals solved step by step.